The present invention relates to a pulse generating circuit in a semiconductor integrated circuit and a delay circuit therefor.
FIG. 1 shows a conventional pulse generating circuit formed in a semiconductor integrated circuit. Applied to an input terminal 1 is a signal .phi.I having a leading edge such as one of a rectangular waveform, as illustrated in FIG. 2. The input signal .phi.I is supplied to a delay circuit 2, which produces a delayed signal .phi.d. The delayed signal .phi.d is passed through an inverter 3 to become an inverted delayed signal .phi.d, which is then supplied to an AND gate 4 together with the input signal .phi.I. The output signal .phi.O of the AND gate 4 is a pulsative signal having a duration td corresponding to the delay time of the delay circuit 2. The delay time of the delay circuit 2 is decided during designing of the semiconductor integrated circuit. This means that the duration of the pulse cannot be adjusted or altered after fabrication of the integrated circuit. In certain applications, this is inconvenient.